ZAMBEZI: a parallel pattern parallel fault sequential circuit fault simulator

Sequential circuit fault simulators use the multiple bits in a computer data word to accelerate simulation. We introduce, and implement, a new sequential circuit fault simulator, a parallel pattern parallel fault simulator, ZAMBEZI, which simultaneously simulates multiple faults with multiple vectors in one data word. ZAMBEZI is developed by enhancing the control ow of existing parallel pattern algorithms. For a very wide range of benchmark circuits, compared to parallel fault and parallel pattern simulators, ZAMBEZI ooers either the best, or very close to the best, uniprocessor performance. ZAMBEZI also ooers superior performance when parallelized.